1. Field of the Invention
This invention relates to a method and apparatus for fast emulation of virtually addressed control flow in multi-processor emulators. In particular this invention describes a way of efficiently emulating the virtual addressing characteristics of a range of processors in multi-processor configurations when the processors are being emulated by a dynamic binary translator.
2. Description of the Related Art
Virtual memory management is an operating system memory management technique in which the physical memory of a computer system is presented to several independently running processes as if each process had access to a large bank of memory for its exclusive use. An address translation process converts the memory addresses (virtual addresses) used by a running process to the actual location (physical addresses) of the data on the computer system. When the sum of the data in all virtual address spaces exceeds the available physical memory, the operating system will typically be responsible for storing the additional data to disk. Different processors implement address translation in various ways; using translation look aside buffers (TLBs), page tables and other techniques. Almost universally, a virtual address space containing the virtual address is mapped to a corresponding physical region or memory and a physical address. The smallest unit of mapping is referred to as a page, typically between 4 and 64K in size; and the logic that performs mapping is known as the memory management unit (MMU).
An operating system will segregate the various processes into separate virtual address spaces. The operating system provides a process with access only to the pages of memory that it has been granted access to, and disallows access to the private data of other processes. However, processes also share library code and global data so a given physical page can be mapped into multiple virtual address spaces simultaneously.
A given platform thread of execution on a platform processor (of which there may be several on a single platform processor) runs with one virtual address space at a time; mapping is used to convert the virtual addresses in the virtual address space to the physical memory addresses that actually contain the data. Therefore, a processor instruction may perform a “32-bit load from address 0x1000” where the virtual address is represented in hexadecimal as 0x1000, and will be transformed by the MMU into a physical address under control of the virtual address space's memory map. When executing a different process with the different virtual address space then the virtual address 0x1000 will be mapped to a different physical address entirely. Conversely, shared libraries (which are present only once in physical memory) may appear in different processes at different virtual addresses, since the virtual address range allocated to a shared library often depends on the order in which the process' shared libraries were loaded, which might be different for different processes.
When the platform processor threads switch from the execution of one process to a new process, a context switch operation will switch out the current virtual address space for a new virtual address space of the new process that is about to be executed.